TC25C25 Datasheet, PDF (2/7 Pages) TelCom Semiconductor, Inc – BICMOS PWM CONTROLLERS

BICMOS PWM CONTROLLERS
TC25C25
TC35C25
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ............................................................18V
Maximum Chip Temperature ................................... 150°C
Storage Temperature ............................ – 65°C to +150°C
Lead Temperature (10 sec) ..................................... 300°C
Package Thermal Resistance
PDIP R_θJ-A ..................................................................... 125°C/W
PDIP R_θJ-C ........................................................................ 45°C/W
SOIC R_θJ-A ..................................................................... 250°C/W
SOIC R_θJ-A ........................................................................ 75°C/W
Operating Temperature
25C2x ........................................ – 40°C ≤ T_A ≤ +85°C
35C2x ............................................. 0°C ≤ T_A ≤ +70°C
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for – 40°C < T_A <
+85°C for the TC25C25Exx; and 0°C <T_A < +70°C for the TC35C25Cxx;
V_IN and V_DD = 16V; R_T = 3.7kΩ; C_T = 1000pF; RD = 760Ω.
Parameter
Test Conditions
Reference Section
Output Voltage
T_J = 25°C, I_O = 1mA
Line Regulation
V_IN = 8V to 18V
Load Regulation
I_I = 1mA to mA
Temp Coefficient
Note 1
V_REF
Worst Case
Long Term Drift
T_J = 25°C, (Note 1)
Short Circuit
Output Noise
V_REF to GND
T_J = 25°C, 10 Hz ≤ f ≥ 10 kHz, (Note 1)
Oscillator Section
Initial Accuracy
T_J = 25°C, at 97 kHz
Voltage Coefficient
V_IN = 8V to 18V
Temp Coefficient
Note 1
OSC Ramp Amplitude
Reset Switch R_{DS (ON)}
T_J = 25°C
Clock Amplitude
f_osc = 100kHz, R_L = 1MΩ, (Note 1)
Clock Min Width
T_J = 25°C, R_D = 0Ω, (Note 1)
C_T = 100pF, R_T = 1Ω
Sync Threshold
R_T Pin Tied to V_REF, C_T Pin at GND
Sync Input Current
Sync Voltage = 4V, V(R_T) = 4V
Min Sync Pulse Width
T_J = 25°C, Sync Amplitude = 5V, (Note 1)
Max OSC Freq
R_T = 1Ω, C_T = 100pF, R_D = 0Ω, (Note 1)
Error Amplifier Section (V_CM = 2.5V)
Input Offset Voltage
Input Bias Current
T_J = 25°C
Input Offset Current
T_J = 25°C
DC Open Loop Gain
R_L = 100kΩ
Gain Bandwidth Product
Note 1
Output Low Level
R_L = 100kΩ (N Channel)
Output High Level
R_L = 100kΩ (NPN)
CMRR
V_CM = 0.5 to 4.7V
4-112
Min
Typ
Max
Units
3.9
4
—
±4
—
±4
—
±0.01
3.85
4
—
±50
20
40
—
21
4.1
V
±10
mV
±15
mV
±0.4
mV/°C
4.15
V
—
mV/1000Hrs
70
mA
—
µV(rms)
—
±2
±3
—
±0.01
±0.1
—
±0.025
±0.06
2.9
3.2
3.4
30
50
60
4.9
5.5
6.7
—
170
200
1.8
2.2
2.8
—
—
±1
—
130
175
1.0
—
—
%
%/V
%/°C
V
Ω
V
nsec
V
µA
nsec
MHz
—
±5
±15
—
±50
±200
—
±25
±100
70
85
—
0.7
0.9
1.2
—
10
20
4.9
5.4
5.9
60
75
—
mV
pA
pA
dB
MHz
mV
V
dB
TELCOM SEMICONDUCTOR, INC.