English
Language : 

PCM1860 Datasheet, PDF (77/115 Pages) Texas Instruments – 4ch Audio ADCs With Universal Front End
www.ti.com
PCM1860, PCM1862, PCM1864, PCM1864-Q1
SLASE55A – NOVEMBER 2014 – REVISED DECEMBER 2014
TX_TDM_OFFSET[7:0]
Set offset position in a serial audio data frame. This setting is enabled when 0x0B FMT[1:0] is set to
DSP format.
Default value: 00000000
0: 0 (Default)
1: 1 BCK (Same as I2S)
2: 2 BCK
3: 3 BCK
:
:
255: 255 BCK
Dec
Hex
14
0x0E
Reset Value
Page 0 / Register 14 (Hex 0x0E)
b7
b6
b5
b4
b3
b2
b1
b0
RX_TDM_OFFSE RX_TDM_OFFSE RX_TDM_OFFSE RX_TDM_OFFSE RX_TDM_OFFSE RX_TDM_OFFSE RX_TDM_OFFSE RX_TDM_OFFSE
T7
T6
T5
T4
T3
T2
T1
T0
0
0
0
0
0
0
0
0
RX_TDM_OFFSET[7:0]
Set offset position in a serial audio data frame. This setting is enabled when I2S_RX_FMT is set to DSP
format.
Default value: 00000000
Offset position in a serial audio data frame.
0: 0 (Default)
1: 1 BCK (Same as I2S, only if LRCK is configured as 50/50 duty cycle)
2: 2 BCK
3: 3 BCK
:
:
255: 255 BCK
Dec
Hex
15
0x0F
Reset Value
b7
DPGA_VAL_CH1
_L7
0
b6
DPGA_VAL_CH1
_L6
0
Page 0 / Register 15 (Hex 0x0F)
b5
b4
b3
DPGA_VAL_CH1 DPGA_VAL_CH1 DPGA_VAL_CH1
_L5
_L4
_L3
0
0
0
b2
DPGA_VAL_CH1
_L2
0
b1
DPGA_VAL_CH1
_L1
0
b0
DPGA_VAL_CH1
_L0
0
DPGA_VAL_CH1_L[7:0]
Gain setting for digital PGA when the device is used in the following scenarios:
i. Analog PGA gain and digital PGA are set separately. ii. Digital Microphone Interface is used (4-channel
device only, when Manual Gain Mapping is enabled in register 0x19)
Default value: 00000000
Specify 2s complement value with 7.1 format.
0x28 - 0x3F in 0.5 dB steps
Others: Reserved
Dec
Hex
16
0x10
Reset Value
b7
GPIO1_POL
0
b6
GPIO1_FUNC2
0
Page 0 / Register 16 (Hex 0x10)
b5
b4
b3
GPIO1_FUNC1 GPIO1_FUNC0
GPIO0_POL
0
0
0
b2
GPIO0_FUNC2
0
b1
GPIO0_FUNC1
0
b0
GPIO0_FUNC0
1
Copyright © 2014, Texas Instruments Incorporated
Submit Documentation Feedback
77
Product Folder Links: PCM1860 PCM1862 PCM1864 PCM1864-Q1