M054LAN Datasheet, PDF (32/64 Pages) Nuvotem Talema – ARM Cortex™-M0 32-BIT MICROCONTROLLER

M052/M054 Data Sheet
6.4 General Purpose I/O
6.4.1 Overview
There are 40 General Purpose I/O pins shared with special feature functions in this MCU. The 40
pins are arranged in 5 ports named with P0, P1, P2, P3 and P4. Each port equips maximum 8
pins. Each one of the 40 pins is independent and has the corresponding register bits to control the
pin mode function and data
The I/O type of each of I/O pins can be software configured individually as input, output, open-
drain or quasi-bidirectional mode. The all pins of I/O type stay in quasi-bidirectional mode and port
data register Px_DOUT[7:0] resets to 0x000_00FF. Each I/O pin equips a very weakly individual
pull-up resistor which is about 110KΩ~300KΩ for V_DD is from 5.0V to 2.5V.
6.4.1.1 Input Mode Explanation
Set Px_PMD(PMDn[1:0]) to 00b the Px[n] pin is in Input mode and the I/O pin is in tri-state(high
impedance) without output drive capability. The Px_PIN value reflects the status of the corresponding
port pins.
6.4.1.2 Output Mode Explanation
Set Px_PMD(PMDn[1:0]) to 2’b01 the Px[n] pin is in Output mode and the I/O pin supports digital
output function with source/sink current capability. The bit value in the corresponding bit [n] of
Px_DOUT is driven on the pin.
VDD
P
Port Latch
Data
Port Pin
N
Input Data
Figure 6–10 Push-Pull Output
6.4.1.3 Open-Drain Mode Explanation
Set Px_PMD(PMDn[1:0]) to 2’b10 the Px[n] pin is in Open-Drain mode and the I/O pin supports
digital output function but only with sink current capability, an additional pull-up resister is needed
for driving high state. If the bit value in the corresponding bit [n] of Px_DOUT is “0”, the pin drive a
“low” output on the pin. If the bit value in the corresponding bit [n] of Px_DOUT is “1”, the pin
output drives high that is controlled by the internal pull-up resistor or the external pull high
resistor.
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Publication Release Date: Mar 15, 2011
Revision V1.0