M054LAN Datasheet, PDF (24/64 Pages) Nuvotem Talema – ARM Cortex™-M0 32-BIT MICROCONTROLLER

M052/M054 Data Sheet
30
0x78
14
SPI0_INT
SPI0
SPI0 interrupt
No
31
0x7C
15
SPI1_INT
SPI1
SPI1 interrupt
No
32-33
0x80-0x84
16-17
-
-
-
-
34
0x88
18
I2C_INT
I2C
I2C interrupt
No
35-43
0x8C-
0xAC
19-27 -
-
-
-
44
0xB0
28
PWRWU_INT CLKC
Clock controller interrupt for chip
wake up from power-down state
Yes
45
0xB4
29
ADC_INT
ADC
ADC interrupt
No
46-47
0xB8-
0xBC
30-31 -
-
-
Table 6–1 Exception Model
Exception Name
Vector Number
Reset
NMI
Hard Fault
Reserved
SVCall
Reserved
PendSV
SysTick
Interrupt (IRQ0 ~ IRQ31)
1
2
3
4 ~ 10
11
12 ~ 13
14
15
16 ~ 47
Table 6–2 System Interrupt Map
Priority
-3
-2
-1
Reserved
Configurable
Reserved
Configurable
Configurable
Configurable
6.2.5.2 Vector Table
When any interrupts is accepted, the processor will automatically fetch the starting address of the
interrupt service routine (ISR) from a vector table in memory. For ARMv6-M, the vector table base
address is fixed at 0x00000000. The vector table contains the initialization value for the stack
pointer on reset, and the entry point addresses for all exception handlers. The vector number on
previous page defines the order of entries in the vector table associated with exception handler
- 24 -
Publication Release Date: Mar 15, 2011
Revision V1.0