W77E058A40DL Datasheet, PDF (19/87 Pages) Nuvotem Talema – GENERAL DESCRIPTION

W77E058A
Poot 2
Bit:
7
6
5
4
3
2
1
0
P2.7 P2.6 P2.5 P2.4 P2.3 P2.2 P2.1 P2.0
Mnemonic: P2
Address: A0h
P2.7-0: Port 2 is a bi-directional I/O port with internal pull-ups. This port also provides the upper
address bits for accesses to external memory.
Port 4
Bit:
7
6
5
4
3
2
1
0
-
-
-
-
P4.3 P4.2 P4.1 P4.0
Mnemonic: P4
Address: A5h
P4.3-0: Port 4 is a bi-directional I/O port with internal pull-ups. Port 4 can not use bit-addressable
instruction (SETB or CLR).
Interrupt Enable
Bit:
7
6
5
4
3
2
1
0
EA
ES1 ET2
ES
ET1 EX1 ET0 EX0
Mnemonic: IE
Address: A8h
EA:
ES1:
ET2:
ES:
ET1:
EX1:
ET0:
EX0:
Global enable. Enable/disable all interrupts.
Enable Serial Port 1 interrupt.
Enable Timer 2 interrupt.
Enable Serial Port 0 interrupt.
Enable Timer 1 interrupt
Enable external interrupt 1
Enable Timer 0 interrupt
Enable external interrupt 0
Slave Address
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADDR
Address: A9h
SADDR: The SADDR should be programmed to the given or broadcast address for serial port 0 to
which the slave processor is designated.
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Publication Release Date: April 17, 2007
Revision A10