SM89516A Datasheet, PDF (4/25 Pages) SyncMOS Technologies,Inc – 8 - Bit Micro-controller with 64KB flash 1KB RAM embedded

SyncMOS Technologies Inc.
September 2002
Pin Descriptions
40L 44L 44L
PDIP QFP PLCC Symbol
Pin# Pin# Pin#
1 40
2 P1.0/T2
2 41
3 P1.1/T2EX
3 42
4 P1.2
4 43
5 P1.3/SPWM0
5 44
6 P1.4/SPWM1
6
1
7 P1.5/SPWM2
7
2
8 P1.6/SPWM3
8
3
9 P1.7/SPWM4
9
4
10 RES
10 5
11 P3.0/RXD
11 7
13 P3.1/TXD
12 8
14 P3.2/#INT0
13 9
15 P3.3/#INT1
14 10 16 P3.4/T0
15 11 17 P3.5/T1
16 12 18 P3.6/#WR
17 13 19 P3.7/#RD
18 14 20 XTAL2
19 15 21 XTAL1
20 16 22 VSS
21 18 24 P2.0/A8
22 19 25 P2.1/A9
23 20 26 P2.2/A10
24 21 27 P2.3/A11
25 22 28 P2.4/A12
26 23 29 P2.5/A13
27 24 30 P2.6/A14
28 25 31 P2.7/A15
29 26 32 #PSEN
30 27 33 ALE
31 29 35 #EA
32 30 36 P0.7/AD7
33 31 37 P0.6/AD6
34 32 38 P0.5/AD5
35 33 39 P0.4/AD4
36 34 40 P0.3/AD3
37 35 41 P0.2/AD2
38 36 42 P0.1/AD1
39 37 43 P0.0/AD0
40 38 44 VDD
17 23 P4.0
28 34 P4.1
39
1 P4.2
6
12 P4.3
Active I/O Names
i/o bit 0 of port 1 & timer 2 clock out
i/o bit 1 of port 1 & timer 2 control
i/o bit 2 of port 1
i/o bit 3 of port 1 & SPWM channel 0
i/o bit 4 of port 1 & SPWM channel 1
i/o bit 5 of port 1 & SPWM channel 2
i/o bit 6 of port 1 & SPWM channel 3
i/o bit 7 of port 1 & SPWM channel 4,
H
i Reset
i/o bit 0 of port 3 & Receive data
i/o bit 1 of port 3 & Transmit data
L/ - i/o bit 2 of port 3 & low true interrupt 0
L/ - i/o bit 3 of port 3 & low true interrupt 1
i/o bit 4 of port 3 & Timer 0 &
i/o bit 5 of port 3 & Timer 1
i/o bit 6 of port 3 & ext. memory write
i/o bit 7 of port 3 & ext. mem. read
o Crystal out
i Crystal in
Sink Voltage, Ground
i/o bit 0 of port 2 & bit 8 of ext. memory address
i/o bit 1 of port 2 & bit 9 of ext. memory address
i/o bit 2 of port 2 & bit 10 of ext. memory address
i/o bit 3 of port 2 & bit 11 of ext. memory address
i/o bit 4 of port 2 & bit 12 of ext. memory address
i/o bit 5 of port 2 & bit 13 of ext. memory address
i/o bit 6 of port 2 & bit 14 of ext. memory address
i/o bit 7 of port 2 & bit 15 of ext. memory address
o program storage enable
o address latch enable
L
i external access
i/o bit 7 of port 0 & data/address bit 7 of ext. memory
i/o bit 6 of port 0 & data/address bit 6 of ext. memory
i/o bit 5 of port 0 & data/address bit 5 of ext. memory
i/o bit 4 of port 0 & data/address bit 4 of ext. memory
i/o bit 3 of port 0 & data/address bit 3 of ext. memory
i/o bit 2 of port 0 & data/address bit 2 of ext. memory
i/o bit 1 of port 0 & data/address bit 1 of ext. memory
i/o bit 0 of port 0 & data/address bit 0 of ext. memory
Drive Voltage, +5 Vcc
i/o bit 0 of Port 4
i/o bit 1 of Port 4
i/o bit 2 of Port 4
i/o bit 3 of Port 4
SM89516A
Specifications subject to change without notice,contact your sales representatives for the most recent information.
4/25
Ver 1.2 SM89516A 09/02