SM59264_06 Datasheet, PDF (15/36 Pages) SyncMOS Technologies,Inc – 8-Bits Micro-controller with 128KB flash & 1KB RAM & TWSI & SPWM embedded

SyncMOS Technologies International, Inc.
SM59264
8-Bits Micro-controller
with 128KB flash & 1KB RAM & TWSI & SPWM embedded
ISP Registers - Flash Data Register (ISPFD, $F6)
bit-7
bit-0
FD7
FD6
FD5
FD4
FD3
FD2
FD1
FD0
Read / Write:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset value:
0
0
0
0
0
0
0
0
FD7 ~FD0 : flash data for ISP function
The ISPFD provide the 8-bit data for ISP function
ISP Registers -Flash Control Register (ISPC, $F7)
bit-7
bit-0
Read / Write:
Reset value:
START
R/W
0
Unused
-
*
ISPF[1:0] : ISP function select bit
ISPF [1:0] ISP function
00
Byte program
01
Chip protect
10
Page erase (512Byte)
11
Chip erase
FAUO
R/W
0
Unused
-
*
Unused
-
*
Unused
-
*
ISPF1
R/W
0
ISPF0
R/W
0
START : ISP function start bit
= 1 : start ISP function which indicated by bit 1, bit 0 (ISPF1, ISPF0)
= 0 : no operation
FAU0 : 64K program Flash or 64K Data Flash select bit
= 1 : selected 64K data flash
= 0 : selected 64K program flash
Note: The START bit is read-only by default, software must write three specific values 55H, AAH and 55H sequentially
to the ISPFD register to enable the START bit write attribute. That is :
MOV ISPFD, #55H
MOV ISPFD, #0AAH
MOV ISPFD, #55H
Any attempt to set START bit will not be allowed without the procedure above.
After START bit set to 1 then the SM59264 hardware circuit will latch flash address and data bus and hold the program
counter until the START bit reset to 0 when ISP function finished. The program counter (PC) will point to next
instruction after START bit reset to 0. User does not need to check START bit status by software method.
Specifications subject to change without notice contact your sales representatives for the most recent information.
15
Ver 2.1 SM59264 08/2006