SM5953 Datasheet, PDF (13/43 Pages) SyncMOS Technologies,Inc – Six interrupt sources with two priority levels

Mnemonic
ANL A,Rn
ANL A,direct
ANL A,@Ri
ANL A,#data
ANL direct,A
ANL direct,#data
ORL A,Rn
ORL A,direct
ORL A,@Ri
ORL A,#data
ORL direct,A
ORL direct,#data
XRL A,Rn
XRL A,direct
XRL A,@Ri
XRL A,#data
XRL direct,A
XRL direct,#data
CLR A
CPL A
RL A
RLC A
RR A
RRC A
SWAP A
Table 2-2: Logic operations
Description
AND register to accumulator
AND direct byte to accumulator
AND indirect RAM to accumulator
AND immediate data to accumulator
AND accumulator to direct byte
AND immediate data to direct byte
OR register to accumulator
OR direct byte to accumulator
OR indirect RAM to accumulator
OR immediate data to accumulator
OR accumulator to direct byte
OR immediate data to direct byte
Exclusive OR register to accumulator
Exclusive OR direct byte to accumulator
Exclusive OR indirect RAM to accumulator
Exclusive OR immediate data to accumulator
Exclusive OR accumulator to direct byte
Exclusive OR immediate data to direct byte
Clear accumulator
Complement accumulator
Rotate accumulator left
Rotate accumulator left through carry
Rotate accumulator right
Rotate accumulator right through carry
Swap nibbles within the accumulator
SM5953
8-Bit Micro-controller
15KB with ISP Flash
& 256B RAM embedded
Code
58-5F
55
56-57
54
52
53
48-4F
45
46-47
44
42
43
68-6F
65
66-67
64
62
63
E4
F4
23
33
03
13
C4
Bytes
1
2
1
2
2
3
1
2
1
2
2
3
1
2
1
2
2
3
1
1
1
1
1
1
1
Cycles
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
2
1
1
1
1
1
1
1
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M074
Ver D SM5953 04/16/2015
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