SMH4044 Datasheet, PDF (5/20 Pages) Summit Microelectronics, Inc. – Compact PCI Hot-Swap Controller With IPMI Support

PIN CONFIGURATION
SMH4044
Preliminary
FAULT#
1
1VREF
2
VSEL 3
PWR_EN
4
nc 5
MONITOR 1
6
A0 7
LOCAL_PCI_RST#
8
nc 9
nc 10
A1 11
A2 12
36 CBI_3
35 HST_3V_MON
34 VGATE3
33 CARD_3V_MON
32 CS#
31 nc
30 MONITOR 2
29 LOCAL_PCI_RST
28 nc
27 SCL
26 SDA
25 nc
2057 PCon
PIN DESCRIPTIONS
A0, A1, A2 (7, 11, 12)
Address inputs 0, 1 and 2 are used to set the three-bit
device address of the memory array. The state of these
inputs will determine the device address for the memory
if it is on a two-wire bus with multiple memories with the
same device type identifier.
SCL (27)
The SCL input is used to clock data into and out of the
memory array. In the write mode, data must remain stable
while SCL is HIGH. In the read mode, data is clocked out
on the falling edge of SCL.
SDA (26)
The SDA pin is a bidirectional pin used to transfer data into
and out of the SMH4044. Data changing from one state
to the other may occur only when SCL is LOW, except
when generating START or STOP conditions. SDA is an
open-drain output and may be wire-ORed with any num-
ber of open-drain outputs.
CARD_3V_MON (33)
This input monitors the card-side 3.3V supply. If the input
falls below V_TRIP then the HEALTHY# and SGNL_VLD#
outputs are de-asserted and the reset outputs are driven
active.
CARD_5V_MON (40)
This input monitors the card-side 5V supply. If the input
falls below V_TRIP then the HEALTHY# and SGNL_VLD#
outputs are de-asserted and the reset outputs are driven
active.
CBI_3 (36)
CBI_3 is the circuit breaker input for the low supply. With
a series resistor placed in the supply path between
HST_3V_MON and CBI_3, the circuit breaker will trip
whenever the voltage across the resistor exceeds 50mV.
SUMMIT MICROELECTRONICS, Inc.
2057 1.x 8/16/01
5