English
Language : 

STM32F303XD Datasheet, PDF (97/173 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, up to 512KB Flash, 80KB SRAM, FSMC, 4 ADCs, 2 DAC ch., 7 comp, 4 Op-Amp, 2.0-3.6 V
STM32F303xD STM32F303xE
Electrical characteristics
Figure 21. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings
&-#?.%X
TW.%
&-#?./%
&-#?.7%
&-#?!;=
&-#?.",;=
&-#?$;=
&-#?.!$6 
TV.7%?.%
TW.7%
TV!?.%
TV",?.%
TV$ATA?.%
T V.!$6?.%
TW.!$6
TH!?.7%
!DDRESS
TH",?.7%
.",
TH$ATA?.7%
$ATA
T H.%?.7%
&-#?.7!)4
TH.%?.7!)4
TSU.7!)4?.%
-36
1. Mode 2/B, C and D only. In Mode 1, FMC_NADV is not used.
Table 47. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)
Symbol
Parameter
Min
Max
Unit
tw(NE)
tv(NWE_NE)
tw(NWE)
th(NE_NWE)
FMC_NE low time
FMC_NEx low to FMC_NWE low
FMC_NWE low time
FMC_NWE high to FMC_NE high hold
time
3THCLK-1
THCLK+0.5
THCLK-2
THCLK-0.5
3THCLK+2
THCLK+1
THCLK+1
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
0
th(A_NWE)
Address hold time after FMC_NWE high THCLK-1.5
-
ns
tv(BL_NE)
FMC_NEx low to FMC_BL valid
-
1
th(BL_NWE)
FMC_BL hold time after FMC_NWE high THCLK-0.5
-
tv(Data_NE)
Data to FMC_NEx low to Data valid
-
THCLK+ 3
th(Data_NWE) Data hold time after FMC_NWE high
THCLK+0.5
-
tv(NADV_NE) FMC_NEx low to FMC_NADV low
-
2.5
tw(NADV)
FMC_NADV low time
-
THCLK+2
1. Based on characterization, not tested in production.
DocID026415 Rev 5
97/173
151