STM32F303XD Datasheet, PDF (1/173 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, up to 512KB Flash, 80KB SRAM, FSMC, 4 ADCs, 2 DAC ch., 7 comp, 4 Op-Amp, 2.0-3.6 V

STM32F303xD STM32F303xE
ARM^® Cortex^®-M4 32b MCU+FPU, up to 512KB Flash, 80KB SRAM,
FSMC, 4 ADCs, 2 DAC ch., 7 comp, 4 Op-Amp, 2.0-3.6 V
Datasheet - production data
Features
• Core: ARM^® Cortex^®-M4 32-bit CPU with
72 MHz FPU, single-cycle multiplication and
HW division, 90 DMIPS (from CCM), DSP
instruction and MPU (memory protection unit)
• Operating conditions:
– V_DD, V_DDA voltage range: 2.0 V to 3.6 V
• Memories
– Up to 512 Kbytes of Flash memory
– 64 Kbytes of SRAM, with HW parity check
implemented on the first 32 Kbytes.
– Routine booster: 16 Kbytes of SRAM on
instruction and data bus, with HW parity
check (CCM)
– Flexible memory controller (FSMC) for
static memories, with four Chip Select
• CRC calculation unit
• Reset and supply management
– Power-on/Power-down reset (POR/PDR)
– Programmable voltage detector (PVD)
– Low-power modes: Sleep, Stop and
Standby
– V_BAT supply for RTC and backup registers
• Clock management
– 4 to 32 MHz crystal oscillator
– 32 kHz oscillator for RTC with calibration
– Internal 8 MHz RC with x 16 PLL option
– Internal 40 kHz oscillator
• Up to 115 fast I/Os
– All mappable on external interrupt vectors
– Several 5 V-tolerant
• Interconnect matrix
• 12-channel DMA controller
• Four ADCs 0.20 µs (up to 40 channels) with
selectable resolution of 12/10/8/6 bits, 0 to
3.6 V conversion range, separate analog
supply from 2.0 to 3.6 V
LQFP64
(10 × 10 mm)
LQFP100
(14 × 14 mm)
LQFP144
(20 x 20 mm)
UFBGA100
(7 x 7 mm)
WLCSP100
(4.775 x 5.041 mm)
• Two 12-bit DAC channels with analog supply
from 2.4 to 3.6 V
• Seven ultra-fast rail-to-rail analog comparators
with analog supply from 2.0 to 3.6 V
• Four operational amplifiers that can be used in
PGA mode, all terminals accessible with
analog supply from 2.4 to 3.6 V
• Up to 24 capacitive sensing channels supporting
touchkey, linear and rotary touch sensors
• Up to 14 timers:
– One 32-bit timer and two 16-bit timers with
up to four IC/OC/PWM or pulse counter
and quadrature (incremental) encoder input
– Three 16-bit 6-channel advanced-control
timers, with up to six PWM channels,
deadtime generation and emergency stop
– One 16-bit timer with two IC/OCs, one
OCN/PWM, deadtime generation and
emergency stop
– Two 16-bit timers with IC/OC/OCN/PWM,
deadtime generation and emergency stop
– Two watchdog timers (independent,
window)
– One SysTick timer: 24-bit downcounter
– Two 16-bit basic timers to drive the DAC
• Calendar RTC with Alarm, periodic wakeup
from Stop/Standby
• Communication interfaces
– CAN interface (2.0B Active)
October 2016
This is information on a product in full production.
DocID026415 Rev 5
1/173
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