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STM32L432KB Datasheet, PDF (88/149 Pages) STMicroelectronics – Batch acquisition mode
Electrical characteristics
STM32L432KB STM3L432KC
Low-speed external user clock generated from an external source
In bypass mode the LSE oscillator is switched off and the input pin is a standard GPIO.
The external clock signal has to respect the I/O characteristics in Section 6.3.14. However,
the recommended clock input waveform is shown in Figure 12.
Symbol
Table 42. Low-speed external user clock characteristics(1)
Parameter
Conditions
Min
Typ
Max
Unit
fLSE_ext User external clock source frequency
VLSEH OSC32_IN input pin high level voltage
VLSEL OSC32_IN input pin low level voltage
tw(LSEH)
tw(LSEL)
OSC32_IN high or low time
1. Guaranteed by design.
-
-
32.768
1000
kHz
-
0.7 VDDIOx
-
VDDIOx
V
-
VSS
-
0.3 VDDIOx
-
250
-
-
ns
Figure 12. Low-speed external clock source AC timing diagram
WZ /6(+
9/6(+


9/6(/
WU /6(
WI /6(
WZ /6(/
W
7/6(
069
Low-speed external clock generated from a crystal resonator
The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal resonator
oscillator. All the information given in this paragraph are based on design simulation results
obtained with typical external components specified in Table 43. In the application, the
resonator and the load capacitors have to be placed as close as possible to the oscillator
pins in order to minimize output distortion and startup stabilization time. Refer to the crystal
resonator manufacturer for more details on the resonator characteristics (frequency,
package, accuracy).
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