STM32L432KB Datasheet, PDF (84/149 Pages) STMicroelectronics – Batch acquisition mode

Electrical characteristics
STM32L432KB STM3L432KC
Table 37. Peripheral current consumption (continued)
Peripheral
Range 1
Range 2
Low-power run
and sleep
Unit
TIM1
8.1
6.5
7.6
TIM15
3.7
3.0
3.4
TIM16
2.7
2.1
2.6
APB2
USART1 independent clock
domain
4.8
4.2
4.6
µA/MHz
USART1 clock domain
1.5
1.3
1.7
All APB2 on
ALL
24.2
19.9
22.6
86.1
65.1
80.9
1. The BusMatrix is automatically active when at least one master is ON (CPU, DMA).
2. The GPIOx (x= A…H) dynamic current consumption is approximately divided by a factor two versus this table values when
the GPIO port is locked thanks to LCKK and LCKy bits in the GPIOx_LCKR register. In order to save the full GPIOx current
consumption, the GPIOx clock should be disabled in the RCC when all port I/Os are used in alternate function or analog
mode (clock is only required to read or write into GPIO registers, and is not used in AF or analog modes).
3. The AHB to APB1 Bridge is automatically active when at least one peripheral is ON on the APB1.
4. The AHB to APB2 Bridge is automatically active when at least one peripheral is ON on the APB2.
6.3.6
Wakeup time from low-power modes and voltage scaling
transition times
The wakeup times given in Table 38 are the latency between the event and the execution of
the first user instruction.
The device goes in low-power mode after the WFE (Wait For Event) instruction.
Symbol
Table 38. Low-power mode wakeup timings⁽¹⁾
Parameter
Conditions
Typ Max Unit
t_WUSLEEP
Wakeup time from Sleep
mode to Run mode
-
6
6
Nb of
CPU
Wakeup time from Low- Wakeup in Flash with Flash in power-down
cycles
t_WULPSLEEP power sleep mode to Low- during low-power sleep mode (SLEEP_PD=1 in
6
8.3
power run mode
FLASH_ACR) and with clock MSI = 2 MHz
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