STM32F100VCT6 Datasheet, PDF (83/98 Pages) STMicroelectronics – High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces

STM32F100xC, STM32F100xD, STM32F100xE
Electrical characteristics
Note:
Any positive injection current within the limits specified for I_INJ(PIN) and ΣI_INJ(PIN) in
Section 5.3.13 does not affect the ADC accuracy.
Figure 33. ADC accuracy characteristics
4095
4094
4093
7
6
5
4
3
2
1
[1LSB_IDEAL
=V^REF+
4096
(or
V_{DDA depending}
4096
on
package)]
E_G
(2)
E_T
(3)
(1)
E_O
E_L
E_D
1 LSB_IDEAL
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E_T=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer curves.
E_O=Offset Error: deviation between the first actual
transition and the first ideal one.
E_G=Gain Error: deviation between the last ideal
transition and the last actual one.
E_D=Differential Linearity Error: maximum deviation
between actual steps and the ideal one.
E_L=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
0
1234567
V_SSA
4093 4094 4095 4096
V_DDA
ai14395b
Figure 34. Typical connection diagram using the ADC
RAIN(1) _AINx
VAIN
Cparasitic
VDD
VT
0.6 V
VT
0.6 V
STM32F10xxx
Sample and hold ADC
converter
RADC(1) _12-bit
converter
IL±1 µA
CADC(1)
ai14139d
1. Refer to Table 51 for the values of R_AIN, R_ADC and C_ADC.
2. C_parasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7 pF). A high C_parasitic value will downgrade conversion accuracy. To remedy
this, f_ADC should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 35 or Figure 36,
depending on whether V_REF+ is connected to V_DDA or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
Doc ID 15081 Rev 7
83/98