M7040N Datasheet, PDF (81/159 Pages) STMicroelectronics – 64K x 72-bit Entry NETWORK PACKET SEARCH ENGINE

Figure 57. Timing Diagram for the Globally Winning Device in Block Number 1
CLK 2X
Cycle 2
Cycle 4
Cycle 6
Cycle 8 Cycle 10
Cycle 1
Cycle 3
Cycle 5
Cycle 7
Cycle 9
PHS_L
M7040N
CMDV
CMD[1:0]
CMD[10:2]
Search1 Search3
01 01 01 01
Search2 Search4
A BA BA BA B
DQ
(LHI[6:0])(1)
0
A BA BA BA B
D1 D2 D3 D4
LHO[1:0](2)
0
(BHI[2:0])(3)
0
BHO[2:0](4)
0
SADR[23:0]
z
CE_L
z
ALE_L
z
z
A3
z
0
z
0
WE_L
z
OE_L
z
SSV
z
SSF
z
CFG = 0101010101010101,
HLAT = 001, TLSZ = 10,
LRAM = 0, LDEV = 0
1z
Search1
(Miss on
this device.) Search2
(Miss on
this device.) ^Search3
(This device
global winner.) Search4
(Miss on this
device.)
1z
1z
AI04704
Note: 1. (LHI[6:0]) stands for the boolean 'OR' of the entire bus LHI[6:0].
2. Each bit in LHO[1:0] is the same logical signal.
3. (BHI[2:0]) stands for the boolean 'OR' of the entire bus BHI[2:0].
4. Each bit in BHO[2:0] is the same logical signal.
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