M7040N Datasheet, PDF (79/159 Pages) STMicroelectronics – 64K x 72-bit Entry NETWORK PACKET SEARCH ENGINE

M7040N
Timing Diagrams for x144 Using Up to 31 M7040N Devices
Figure 55. Timing Diagram for Each Device in Block Number 0 (Miss on Each Device)
Cycle 2
Cycle 4
Cycle 6
Cycle 8
Cycle 10
Cycle 1
Cycle 3
Cycle 5
Cycle 7
Cycle 9
CLK 2X
PHS_L
CMDV
CMD[1:0]
CMD[10:2]
Search1
Search3
01 01 01 01
Search2
Search4
A BABABAB
DQ
(LHI[6:0])⁽¹⁾
0
LHO[1:0]⁽²⁾
0
(BHI[2:0])⁽³⁾
0
BHO[2:0]⁽⁴⁾
0
SADR[23:0]
z
CE_L
z
ALE_L
z
WE_L
z
OE_L
z
SSV
z
SSF
z
A BABABAB
D1 D2 D3 D4
CFG = 0101010101010101,
HLAT = 001, TLSZ = 10,
LRAM = 0, LDEV = 0
Search1
(Miss on this
device.)
Search2
(Miss on this
device.)
Search3
(Miss on this
device.)
Search4
(Miss on this
device.)
AI04703
Note: 1. (LHI[6:0]) stands for the boolean 'OR' of the entire bus LHI[6:0].
2. Each bit in LHO[1:0] is the same logical signal.
3. (BHI[2:0]) stands for the boolean 'OR' of the entire bus BHI[2:0].
4. Each bit in BHO[2:0] is the same logical signal.
79/159