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SPC564A70B4 Datasheet, PDF (79/133 Pages) STMicroelectronics – Up to 4 multiply and accumulate operations per cycle
SPC564A70B4, SPC564A70L7
Electrical characteristics
Table 16. PMC electrical characteristics (continued)
ID
Name
C
Parameter
Value
Unit
Min
Typ
Max
7b Por3.3V_f CC C Nominal POR for falling 3.3 V supply
—
1.95
—
V
7c
—
CC C Variation of POR for falling 3.3 V supply
Por3.3V_f −
35%
Por3.3V_f
Por3.3V_f
+ 35%
V
8 Lvi5p0 CC C Nominal LVI for rising 5 V VDDREG supply
—
4.290
—
V
8a
—
CC
C
Variation of LVI for rising 5 V VDDREG
supply at power-on reset
Lvi5p0 − 6% Lvi5p0 Lvi5p0 + 6% V
8b
—
CC
C
Variation of LVI for rising 5 V VDDREG
supply power-on reset
Lvi5p0 − 3% Lvi5p0 Lvi5p0 + 3% V
8c
—
CC C Trimming step LVI 5 V
—
20
—
mV
8d Lvi5p0_h CC C LVI 5 V hysteresis
—
60
—
mV
9 Por5V_r CC C Nominal POR for rising 5 V VDDREG supply —
2.67
—
V
9a
—
CC
C
Variation of POR for rising 5 V VDDREG
supply
Por5V_r
− 35%
Por5V_r
Por5V_r
+ 35%
V
9b
Por5V_f
CC
C
Nominal POR for falling 5 V VDDREG
supply
—
2.47
—
V
9c
—
CC
C
Variation of POR for falling 5 V VDDREG
supply
Por5V_f
− 35%
Por5V_f
Por5V_f
+ 35%
V
1. Using external ballast transistor.
2. Min range is extended to 10% since Lvi1p2 is reprogrammed from 1.2 V to 1.16 V after power-on reset.
3. LVI for falling supply is calculated as LVI rising – LVI hysteresis.
4. Lvi1p2 tracks DC target variation of internal VDD regulator. Minimum and maximum Lvi1p2 correspond to minimum and
maximum VDD DC target respectively.
5. With internal load up to Idd3p3
6. The Lvi3p3 specs are also valid for the VDDEH LVI
7. Lvi3p3 tracks DC target variation of internal VDD33 regulator. Minimum and maximum Lvi3p3 correspond to minimum and
maximum VDD33 DC target respectively.
8. The 3.3V POR specs are also valid for the VDDEH POR
3.6.1
Regulator example
In designs where the SPC564A70 microcontroller’s internal regulators are used, a ballast is
required for generation of the 1.2 V internal supply. No ballast is required when an external
1.2 V supply is used.
Doc ID 18078 Rev 4
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