RM0377 Datasheet, PDF (74/862 Pages) STMicroelectronics – This reference manual targets application developers

RM0377
Flash program memory and data EEPROM (FLASH)
1. Unlock the FLASH_PECR register (see the Unlocking the data EEPROM and the
FLASH_PECR register section).
2. Write OPTKEY1 = 0xFBEAD9C8 to the FLASH_OPTKEYR register.
3. Write OPTKEY2 = 0x24252627 to the FLASH_OPTKEYR register.
For code example, refer to A.3.4: Unlocking the option bytes area code example.
If the keys are written with PELOCK = 1, no error is generated, OPTLOCK remains at 1 and
it will be unlocked when re-executing the sequence with PELOCK to 0.
Any wrong key sequence will lock up OPTLOCK in FLASH_PECR until the next reset, and
return a bus error. A bus error is returned in any of the four cases below:
• After the first write access if the OPTKEY1 value entered is erroneous.
• During the second write access if OPTKEY1 is correctly entered but the OPTKEY2
value does not match.
• If there is any attempt to write a third value to OPTKEYR (this is also true for the
debugger).
• If there is any attempt to write a different register of the memory interface between
OPTKEY1 and OPTKEY2.
When properly executed, the unlocking sequence clears the OPTLOCK bit and the Option
bytes area is write-accessible.
To lock the Option bytes area again, the software only needs to set OPTLOCK bit in
FLASH_PECR. When relocked, OPTLOCK bit needs a new sequence to return to 0. If
PELOCK returns to 1 (locked), OPTLOCK is automatically locked, too.
Select between different types of operations
When the necessary unlock sequence has been executed (PELOCK, PRGLOCK and
OPTLOCK), the user can enable different types of write and erase operations, writing the
right configuration in the FLASH_PECR register. The bits involved are:
• PRG
• DATA
• FIX
• ERASE
• FPRG
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