RM0383 Datasheet, PDF (63/837 Pages) STMicroelectronics – This Reference manual targets application developers

RM0383
Embedded Flash memory interface
Access: no wait state when no Flash memory operation is ongoing, word, half-word and
byte access.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SPR
MOD
Reserved
nWRP[7:0]
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15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RDP[7:0]
nRST_ nRST_ WDG_
STDBY STOP SW ^Reserv
BOR_LEV
OPTST OPTLO
RT
CK
ed
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rs
Bit 31 SPRMOD: Selection of Protection Mode of nWPRi bits
0: PCROP disabled, nWPRi bits used for Write Protection on sector i
1: PCROP enabled, nWPRi bits used for PCROP Protection on sector i
Bits 30:24 Reserved, must be kept cleared.
Bits 23:16 nWRP[7:0]: Not write protect
These bits contain the value of the write-protection option bytes of sectors after reset. They
can be written to program a new write protect value into Flash memory.
0: Write protection active on selected sector
1: Write protection not active on selected sector
These bits contain the value of the write-protection and read-protection (PCROP) option
bytes for sectors 0 to 5 after reset. They can be written to program a new write-protect or
PCROP value into Flash memory.
If SPRMOD is reset:
0: Write protection active on sector i
1: Write protection not active on sector i
If SPRMOD is set:
0: PCROP protection not active on sector i
1: PCROP protection active on sector i
Bits 15:8 RDP: Read protect
These bits contain the value of the read-protection option level after reset. They can be
written to program a new read protection value into Flash memory.
0xAA: Level 0, read protection not active
0xCC: Level 2, chip read protection active
Others: Level 1, read protection of memories active
Bits 7:5 USER: User option bytes
These bits contain the value of the user option byte after reset. They can be written to
program a new user option byte value into Flash memory.
Bit 7: nRST_STDBY
Bit 6: nRST_STOP
Bit 5: WDG_SW
Note: When changing the WDG mode from hardware to software or from software to
hardware, a system reset is required to make the change effective.
Bit 4 Reserved, must be kept cleared. Always read as “0”.
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