ST10F273 Datasheet, PDF (55/179 Pages) STMicroelectronics – 16-bit MCU with 512 Kbyte Flash memory and 36 Kbyte RAM

ST10F273
Interrupt system
When different sources submit an interrupt request, the enable bits (Byte High of XIRxSEL
register) define a mask which controls which sources will be associated with the unique
available vector. If more than one source is enabled to issue the request, the service routine
will have to take care to identify the real event to be serviced. This can easily be done by
checking the flag bits (Byte Low of XIRxSEL register). Note that the flag bits can also
provide information about events which are not currently serviced by the interrupt controller
(since masked through the enable bits), allowing an effective software management also in
absence of the possibility to serve the related interrupt request: a periodic polling of the flag
bits may be implemented inside the user application.
Figure 7.
X-Interrupt basic structure
7
0
Flag[7:0]
XIRxSEL[7:0] (x = 0, 1, 2, 3)
IT Source 7
IT Source 6
IT Source 5
IT Source 4
IT Source 3
IT Source 2
IT Source 1
IT Source 0
XPxIC.XPxIR (x = 0, 1, 2, 3)
Enable[7:0]
15
XIRxSEL[15:8] (x = 0, 1, 2, 3)
8
The Table 30 summarizes the mapping of the different interrupt sources which shares the
four X-interrupt vectors.
Table 30. X-Interrupt detailed mapping
XP0INT
CAN1 interrupt
x
CAN2 interrupt
I2C receive
x
I2C transmit
x
I2C error
SSC1 receive
x
SSC1 transmit
x
SSC1 error
ASC1 receive
x
ASC1 transmit
x
ASC1 transmit buffer
x
ASC1 error
XP1INT
x
x
x
x
x
x
x
x
XP2INT
x
x
x
x
x
x
x
XP3INT
x
x
x
x
x
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