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STM32F101RBT6 Datasheet, PDF (54/89 Pages) STMicroelectronics – Medium-density access line, ARM-based 32-bit MCU with 64 or 128 KB Flash, 6 timers, ADC and 7 communication interfaces
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Electrical characteristics
STM32F101x8, STM32F101xB
5.3.13 I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 34 are derived from tests
performed under the conditions summarized in Table 8. All I/Os are CMOS and TTL
compliant.
Table 34. I/O static characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Low level input
voltage
VIH
High level input
voltage
Standard IO
input low level
-
voltage
IO FT(3) input
low level voltage
-
- 0.28*(VDD-2 V)+0.8 V(1)
- 0.32*(VDD-2 V)+0.75 V(1)
All I/Os except
BOOT0
-
-
0.35VDD(2)
Standard IO
V
input high level 0.41*(VDD-2 V)+1.3 V(1) -
-
voltage
IO FT(3) input
high level
0.42*(VDD-2 V)+1 V(1) -
-
voltage
All I/Os except
BOOT0
0.65VDD(2)
-
-
Standard IO Schmitt
trigger voltage
Vhys hysteresis(4)
IO FT Schmitt trigger
voltage hysteresis(4)
200
-
5% VDD(5)
-
-
mV
-
VSS ≤ VIN ≤ VDD
Ilkg
Input leakage current
(6)
Standard I/Os
-
-
±1
µA
VIN = 5 V
I/O FT
-
-
3
RPU
Weak pull-up
equivalent resistor(7)
RPD
Weak pull-down
equivalent resistor(7)
VIN = VSS
VIN = VDD
30
40
50
kΩ
30
40
50
CIO I/O pin capacitance
-
5
-
pF
1. Data based on design simulation.
2. Tested in production.
3. FT = Five-volt tolerant. In order to sustain a voltage higher than VDD+0.3 the internal pull-up/pull-down resistors must be
disabled.
4. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization, not tested in production.
5. With a minimum of 100 mV.
6. Leakage could be higher than max. if negative current is injected on adjacent pins.
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