TDA7522 Datasheet, PDF (5/23 Pages) STMicroelectronics – Digital Servo & Decoder

TDA7522
Pin Number
33
34
35
36
Name
TESTEN
SCK
SDA
SCANEN
37
KASEL
38
KTEST
39
KSEARCH
40
MSTOP
41
SLEDL
42
K_VER_HOR
43
WFCK
44
EXCK
45
SBSO
46
SCOR
47
DOUT
48
CS
49
SRQ
50
CORE_VDD_3
51
CORE_VSS_3
52
DATAS
53
DATAM
54
CLK
55
DRS
56
DWR
57
CAS
58
RAS
59
DRA11
60
DRA10
61
DRA9
62
DRA8
63
DRA7
64
DRA6
Function
I
I
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
O
I
O
O
O
I/O
I/O
Vdd
Gnd
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Description
Test enable signal (Active low)
IIC I/F clock signal
IIC I/F data
Scan enable (active high) or select DRAM outputs as TEST
outputs when TESTEN is inactive
DAC polarity selection pin or ST7 GPIO PA0
User test mode selection or ST7 GPIO PA1
Gain change during search or ST7 GPIO PA3
interrupt request/stand-by pin or ST7 GPIO PC5
SLED limit switch or ST7 GPIO PC6
Indication of vertical or horizontal operation
or ST7 GPIO PA4
Write Frame clock for Subcode P-W output
SBSO readout clock input
Subcode P-W serial output
Subcode sync output
SPDIF Digital audio output
ST7 GPIO PC4
ST7 GPIO PC3
Digital Power supply
Digital Ground
ST7 GPIO PC2
ST7 GPIO PC1
ST7 GPIO PC0
Shock proof memory Read control
Shock proof memory Write control
Shock proof memory Column address select
Shock proof memory Row address select
DRAM Address 11
DRAM Address 10
DRAM Address 9 or Mirror signal output
DRAM Address 8 or TZC (Tracking Zero Cross) signal output
DRAM Address 7 or FOK (Focus OK) signal output
DRAM Address 6 or ST7 GPIO PB7 or PLLINF signal output
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