STD2N80K5 Datasheet, PDF (5/23 Pages) STMicroelectronics – Ultra low gate charge

STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5
Electrical characteristics
Symbol
Table 6. Switching times
Parameter
Test conditions
t_d(on)
t_r
t_d(off)
t_f
Turn-on delay time
Rise time
Turn-off delay time
Fall time
V_DD = 400 V, I_D = 1 A,
R_G=4.7 Ω, V_GS=10 V
Min. Typ. Max. Unit
-
8
- ns
- 12 - ns
- 19 - ns
- 32 - ns
Symbol
Table 7. Source drain diode
Parameter
Test conditions
I_SD
(1)
I_SDM
(2)
V_SD
Source-drain current
Source-drain current (pulsed)
Forward on voltage
I_SD= 2 A, V_GS=0
t_rr
Q_rr
I_RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I_SD= 2 A, V_DD= 60 V
di/dt = 100 A/μs,
t_rr
Q_rr
I_RRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
I_SD= 2 A,V_DD= 60 V
di/dt=100 A/μs,
Tj=150 °C
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%
Min. Typ. Max. Unit
-
2A
-
8A
-
1.5 V
- 255
ns
-1
μC
-8
A
- 285
ns
- 1.45
μC
- 7.5
A
Symbol
Table 8. Gate-source Zener diode
Parameter
Test conditions
Min. Typ. Max. Unit
V_(BR)GSO Gate-source breakdown voltage I_GS= ± 1mA, I_D= 0
30 -
-
V
The built-in back-to-back Zener diodes have been specifically designed to enhance not only
the device’s ESD capability, but also to make them capable of safely absorbing any voltage
transients that may occasionally be applied from gate to source. In this respect, the Zener
voltage is appropriate to achieve efficient and cost-effective protection of device integrity.
The integrated Zener diodes thus eliminate the need for external components.
DocID024993 Rev 2
5/23