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STD2LN60K3 Datasheet, PDF (5/20 Pages) STMicroelectronics – N-channel 600 V, 4typ., 2 A SuperMESH3 Power MOSFET in DPAK, TO-220FP and IPAK packages
STD2LN60K3, STF2LN60K3, STU2LN60K3
Electrical characteristics
Table 7. Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
VDD = 300 V, ID =1 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 17)
Min. Typ. Max. Unit
10
ns
8.5
ns
-
-
23.5
ns
21
ns
Table 8.
Symbol
Source drain diode
Parameter
Test conditions
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 2 A, VGS = 0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 2 A, di/dt = 100 A/µs
VDD = 60 V (see Figure 22)
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 2 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 22)
1. Pulse width limited by safe operating area.
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Min. Typ. Max. Unit
2A
-
8A
-
1.5 V
200
ns
- 800
nC
8
A
230
ns
- 950
nC
8.5
A
Table 9. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
BVGSO(1)
Gate-source breakdown
voltage
Igs= ± 1 mA (open drain)
30
-
V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
Doc ID 023500 Rev 1
5/20