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| ST10F276E Datasheet, PDF (48/235 Pages) STMicroelectronics – 16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM | |||
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Bootstrap loader
ST10F276E
5.2.2
ST10 configuration in BSL
When the ST10F276E has entered BSL mode, the configuration shown in Table 29 is
automatically set (values that deviate from the normal reset values are marked in bold).
Table 29. ST10 configuration in BSL mode
Function or register
Access
Notes
Watchdog Timer
Disabled
Register SYSCON
0404H (1)
XPEN bit set for Bootstrap via CAN or
Alternate Boot Mode
Context Pointer CP
Register STKUN
Stack Pointer SP
Register STKOV
Register BUSCON0
FA00H
FC00H
FA40H
FA00H
acc. to startup config.(2)
Register S0CON
Register S0BG
8011H
acc. to â00â byte
Initialized only if Bootstrap via UART
Initialized only if Bootstrap via UART
P3.10 / TXD0
â1â
Initialized only if Bootstrap via UART
DP3.10
â1â
Initialized only if Bootstrap via UART
CAN1 Status/Control
Register
0000H
Initialized only if Bootstrap via CAN
CAN1 Bit Timing Register acc. to â0â frame
Initialized only if Bootstrap via CAN
XPERCON
042DH
XRAM1-2, XFlash, CAN1 and XMISC
enabled. Initialized only if Bootstrap via CAN
P4.6 / CAN1_TxD
â1â
Initialized only if Bootstrap via CAN
DP4.6
â1â
Initialized only if Bootstrap via CAN
1. In Bootstrap modes (standard or alternate) ROMEN, bit 10 of SYSCON, is always set regardless of EA pin
level. BYTDIS, bit 9 of SYSCON, is set according to data bus width selection via Port0 configuration.
2. BUSCON0 is initialized with 0000h, external bus disabled, if pin EA is high during reset. If pin EA is low
during reset, BUSACT0, bit 10, and ALECTL0, bit 9, are set enabling the external bus with lengthened ALE
signal. BTYP field, bit 7 and 6, is set according to Port0 configuration.
48/235
Doc ID 12303 Rev 3
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