ST92F124_06 Datasheet, PDF (420/429 Pages) STMicroelectronics – 8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TM(EMULATED EEPROM), CAN 2.0B AND J1850 BLPD

ST92F124/F150/F250 - KNOWN LIMITATIONS
KNOWN LIMITATIONS (Cont’d)
Arbitra-
tion
End-Of
-Block
MFT0
Output _DMA
Com- _Request
pare
DMA
Transfer
CM0D
reset
Interrupt
Request
End-of-Block
Interrupt
Routine
MFT1
Output
Compare
DMA
Request
DMA
Transfer
CM0D
reset ⁽¹⁾
(1) The MFT1 CM0D bit should not be reset by the End-of-
Block signal unless its DMA request is being serviced.
The next Output Compare
event generates an interrupt
and not a DMA request.
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