STM32F765XX Datasheet, PDF (42/255 Pages) STMicroelectronics – Dual mode Quad-SPI

Functional overview
STM32F765xx STM32F767xx STM32F768Ax STM32F769xx
2.25
Universal synchronous/asynchronous receiver transmitters
(USART)
The devices embed USART. Refer to Table 8: USART implementation for the features
implementation.
The universal synchronous asynchronous receiver transmitter (USART) offers a flexible
means of full-duplex data exchange with external equipment requiring an industry standard
NRZ asynchronous serial data format.
The USART peripheral supports:
• Full-duplex asynchronous communications
• Configurable oversampling method by 16 or 8 to give flexibility between speed and
clock tolerance
• Dual clock domain allowing convenient baud rate programming independent from the
PCLK reprogramming
• A common programmable transmit and receive baud rate of up to 27 Mbit/s when the
USART clock source is system clock frequency (max is 216 MHz) and oversampling by
8 is used.
• Auto baud rate detection
• Programmable data word length (7 or 8 or 9 bits) word length
• Programmable data order with MSB-first or LSB-first shifting
• Progarmmable parity (odd, even, no parity)
• Configurable stop bits (1 or 1.5 or 2 stop bits)
• Synchronous mode and clock output for synchronous communications
• Single-wire half-duplex communications
• Separate signal polarity control for transmission and reception
• Swappable Tx/Rx pin configuration
• Hardware flow control for modem and RS-485 transceiver
• Multiprocessor communications
• LIN master synchronous break send capability and LIN slave break detection capability
• IrDA SIR encoder decoder supporting 3/16 bit duration for normal mode
• Smartcard mode ( T=0 and T=1 asynchronous protocols for Smartcards as defined in
the ISO/IEC 7816-3 standard )
• Support for Modbus communication
Table 8 summarizes the implementation of all U(S)ARTs instances
Table 8. USART implementation
features⁽¹⁾
USART1/2/3/6
UART4/5/7/8
Data Length
Hardware flow control for modem
Continuous communication using DMA
Multiprocessor communication
Synchronous mode
7, 8 and 9 bits
X
X
X
X
X
X
X
-
42/255
DocID029041 Rev 4