STD105N10F7AG Datasheet, PDF (4/14 Pages) STMicroelectronics – High avalanche ruggedness

Electrical characteristics
STD105N10F7AG
2
Electrical characteristics
(TCASE = 25 °C unless otherwise specified)
Table 5: On/Off states
Symbol
Parameter
Test conditions
V(BR)DSS
IDSS
Drain-source breakdown
voltage (VGS = 0)
Zero gate voltage
drain current (VGS = 0)
ID = 250 μA
VDS = 100 V
VDS = 100 V, TC = 125 °C ⁽¹⁾
IGSS
VGS(th)
RDS(on)
Gate body leakage
current (VDS = 0)
Gate threshold voltage
Static drain-source
on-resistance
VGS = ± 20 V
VDS = VGS , ID = 250 μA
VGS = 10 V, ID= 40 A
Min. Typ. Max. Unit
100
V
1
µA
100 µA
± 100 nA
2.5
4.5 V
6.8
8 mΩ
Notes:
(1)_{Defined by design, not subject to production test.}
Symbol
Parameter
Ciss Input capacitance
Coss Output capacitance
Crss
Reverse transfer
capacitance
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
Table 6: Dynamic
Test conditions
VDS = 50 V, f = 1 MHz,
VGS = 0 V
VDD = 50 V, ID = 80 A,
VGS = 10 V
(see Figure 14: "Test circuit for
gate charge behavior")
Min. Typ. Max. Unit
- 4369 - pF
- 823 - pF
-
36
-
pF
-
61
- nC
-
26
- nC
-
13
- nC
Symbol
Parameter
td(on) Turn-on delay time
tr
Rise time
td(off) Turn-off delay time
tf
Fall time
Table 7: Switching times
Test conditions
VDD = 50 V, ID = 40 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 13: "Test circuit for
resistive load switching times"
and Figure 18: "Switching time
waveform")
Min. Typ. Max. Unit
-
27
-
ns
-
40
-
ns
-
46
-
ns
-
15
-
ns
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DocID027071 Rev 4