M14256 Datasheet, PDF (4/12 Pages) STMicroelectronics – Memory Card IC 256/128 Kbit Serial I²C Bus EEPROM

M14256, M14128
Figure 4. I²C Bus Protocol
SCL
SDA
START
CONDITION
SDA
SDA
INPUT CHANGE
STOP
CONDITION
SCL
SDA
1
2
3
MSB
START
CONDITION
7
8
9
ACK
SCL
1
2
3
7
8
9
SDA
MSB
ACK
STOP
CONDITION
AI00792
responding memory gives an acknowledgment on
the SDA bus during the 9^th bit time. If the memory
does not match the Device Select code, it will de-
select itself from the bus, and go into stand-by
mode.
Each data byte in the memory has a 16-bit (two
byte wide) address. The Most Significant Byte (Ta-
ble 3) is sent first, followed by the Least significant
Byte (Table 4). Bits b15 to b0 form the address of
the byte in memory. Bit b15 is treated as a Don’t
Care bit on the M14256 memory. Bits b15 and b14
are treated as Don’t Care bits on the M14128
memory.
Table 3. Most Significant Byte
b15 b14 b13 b12 b11 b10 b9 b8
Note: 1. b15 is Don’t Care on the M14256 series.
b15 and b14 are Don’t Care on the M14128 series.
Table 4. Least Significant Byte
b7 b6 b5 b4 b3 b2 b1 b0
Table 5. Device Select Code ¹
Device Code
Chip Enable
RW
b7
b6
b5
b4
b3
b2
b1
b0
Device Select
1
0
1
0
0
0
0
RW
Note: 1. The most significant bit, b7, is sent first.
4/12