STM32L452XX Datasheet, PDF (37/210 Pages) STMicroelectronics – Ultra-low-power with FlexPowerControl

STM32L452xx
Functional overview
3.14
3.14.1
3.14.2
Interrupts and events
Nested vectored interrupt controller (NVIC)
The devices embed a nested vectored interrupt controller able to manage 16 priority levels,
and handle up to 67 maskable interrupt channels plus the 16 interrupt lines of the Cortex^®-
M4.
The NVIC benefits are the following:
• Closely coupled NVIC gives low latency interrupt processing
• Interrupt entry vector table address passed directly to the core
• Allows early processing of interrupts
• Processing of late arriving higher priority interrupts
• Support for tail chaining
• Processor state automatically saved
• Interrupt entry restored on interrupt exit with no instruction overhead
The NVIC hardware block provides flexible interrupt management features with minimal
interrupt latency.
Extended interrupt/event controller (EXTI)
The extended interrupt/event controller consists of 37 edge detector lines used to generate
interrupt/event requests and wake-up the system from Stop mode. Each external line can be
independently configured to select the trigger event (rising edge, falling edge, both) and can
be masked independently A pending register maintains the status of the interrupt requests.
The internal lines are connected to peripherals with wakeup from Stop mode capability. The
EXTI can detect an external line with a pulse width shorter than the internal clock period. Up
to 83 GPIOs can be connected to the 16 external interrupt lines.
DocID029968 Rev 2
37/210
55