RM0385 Datasheet, PDF (338/1644 Pages) STMicroelectronics – This reference manual targets application developers

Flexible memory controller (FMC)
RM0385
Figure 50. Synchronous multiplexed read mode waveforms - NOR, PSRAM (CRAM)
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1. Byte lane outputs (NBL are not shown; for NOR access, they are held high, and, for PSRAM (CRAM)
access, they are held low.
Bit number
Bit name
Table 77. FMC_BCRx bit fields
Value to set
31-22
21
20
19
18:16
15
14
13
12
Reserved 0x000
WFDIS As needed
CCLKEN As needed
CBURSTRW No effect on synchronous read
CPSIZE 0x0 (no effect in asynchronous mode)
ASYNCWAIT 0x0
EXTMOD 0x0
WAITEN
To be set to 1 if the memory supports this feature, to be kept at 0
otherwise
WREN
no effect on synchronous read
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