RM0385 Datasheet, PDF (1377/1644 Pages) STMicroelectronics – This reference manual targets application developers

RM0385
USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
Note:
Bits 16:2 Reserved, must be kept at reset value.
Bit 1 IEP1INT: IN endpoint 1interrupt bit
Bit 0 Reserved, must be kept at reset value.
Configuration register applies only to USB OTG HS
37.15.44 OTG device IN endpoint FIFO empty interrupt mask register
(OTG_DIEPEMPMSK)
Address offset: 0x834
Reset value: 0x0000 0000
This register is used to control the IN endpoint FIFO empty interrupt generation
(TXFE_OTG_DIEPINTx).
31
Res.
30
Res.
29
Res.
28
Res.
27
Res.
26
Res.
25
Res.
24
Res.
23
Res.
22
Res.
21
Res.
20
Res.
19
Res.
18
Res.
17
Res.
16
Res.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
INEPTXFEM
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 INEPTXFEM: IN EP Tx FIFO empty interrupt mask bits
These bits act as mask bits for OTG_DIEPINTx.
TXFE interrupt one bit per IN endpoint:
Bit 0 for IN endpoint 0, bit 3 for IN endpoint 3
0: Masked interrupt
1: Unmasked interrupt
37.15.45 OTG device each endpoint interrupt register mask
(OTG_DEACHINTMSK)
Address offset: 0x083C
Reset value: 0x0000 0000
There is one interrupt bit for endpoint 1 IN and one interrupt bit for endpoint 1 OUT.
31
Res.
15
Res.
30
Res.
14
Res.
29
Res.
13
Res.
28
Res.
12
Res.
27
Res.
11
Res.
26
Res.
10
Res.
25
Res.
9
Res.
24
Res.
8
Res.
23
Res.
7
Res.
22
Res.
6
Res.
21
Res.
5
Res.
20
Res.
4
Res.
19
Res.
3
Res.
18
Res.
2
Res.
17
OEP1
INTM
rw
1
IEP1I
NTM
rw
16
Res.
0
Res.
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