M69KB128AA Datasheet, PDF (32/68 Pages) STMicroelectronics – 128 Mbit (8Mb x16) 1.8V Supply, Burst PSRAM

7 Configuration registers
M69KB128AA
Table 9. Bus Configuration Register Definition
Address
Bits
Bus
Configuration
Register Bits
Name
Value
Description
A15
A14
A13-A11
BCR15
BCR14
BCR13-
BCR11
Operating Mode ⁰
Bit
1
0
Latency Type
1
010
011
Latency Counter ¹⁰⁰
Bits
101
Synchronous Mode (NOR Flash or Full
Synchronous Mode)
Asynchronous Mode (Default)
Variable Latency (Default)
Fixed Latency
3 Clock Cycles
4 Clock Cycles (Default)
5 Clock Cycles
6 Clock Cycles
110
7 Clock Cycles
Other Configurations Reserved⁽¹⁾
0
A10
BCR10
WAIT Polarity Bit
1
WAIT Active Low
WAIT Active High (default).See Figure 10:
WAIT Polarity.
A9
-
-
Must be set to ‘0’ _Reserved⁽¹⁾
A8
A7-A6
A5-A4
BCR8
-
BCR5-BCR4
0
Wait
Configuration Bit
1
WAIT Asserted During Delay (see Figure 9:
WAIT Configuration Example).
WAIT Asserted One Clock Cycle Before Delay
(Default)
-
Must be set to ‘0’ _Reserved⁽¹⁾
00
Full Drive
Driver Strength ⁰¹
Bits
10
1/2 Drive (Default)
1/4 Drive
11
Reserved⁽¹⁾
0
A3
BCR3
Burst Wrap Bit
1
001
010
Wrap
No Wrap (Default)
4 Words
8 Words
A2-A0
BCR2-BCR0
011
Burst Length Bit
100
16 Words
32 Words
111
Continuous Burst (default)
Other Configurations Reserved⁽¹⁾
1. Programming the BCR with reserved value will force the device to use the default register settings.
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