STD95NH02L Datasheet, PDF (3/11 Pages) STMicroelectronics – N-CHANNEL 24V - 0.0039ohm - 80A DPAK ULTRA LOW GATE CHARGE STripFET MOSFET

STD95NH02L
ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 6: Dynamic
Symbol
Parameter
g_fs (4) Forward Transconductance
C_iss
C_oss
C_rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
t_d(on)
t_r
t_d(off)
t_f
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Q_g
Total Gate Charge
Q_gs
Gate-Source Charge
Q_gd
Gate-Drain Charge
Q_oss (5) Output Charge
Q_gls (6) Third-Quadrant Gate Charge
R_G
Gate Input Resistance
Test Conditions
V_DS = 10 V_, I_D = 10 A
V_DS = 15V, f = 1 MHz, V_GS = 0
V_DD = 12 V, I_D = 40 A,
R_G= 4.7 Ω V_GS = 10 V
(see Figure 16)
V_DD = 12 V, I_D = 80 A,
V_GS = 5 V
(see Figure 19)
V_DS = 19 V, V_GS = 0 V
V_DS < 0 V, V_GS = 5 V
f = 1 MHz Gate DC Bias = 0
Test Signal Level = 20 mV
Open Drain
Table 7: Source Drain Diode
Symbol
Parameter
Test Conditions
I_SD
Source-drain Current
I_SDM
Source-drain Current (pulsed)
V_SD (4) Forward On Voltage
I_SD = 40A, V_GS = 0
t_rr
Q_rr
I_RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I_SD = 80A, di/dt = 100 A/µs,
V_DD =20 V, T_j = 150°C
(see Figure 16)
(4). Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(5). Q_oss = C_oss*∆ V_in, C_oss = C_gd+C_ds. See Appendix A.
(6). Gate charge for Syncronous Operation.
Min.
Min.
Typ.
30
2070
990
90
20
110
47
20
17
7.6
6.8
22.6
15
1.8
Typ.
42
50.4
2.4
Max.
Unit
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
nC
nC
Ω
Max.
80
320
1.3
Unit
A
A
V
ns
nC
A
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