STW82101B Datasheet, PDF (29/68 Pages) STMicroelectronics – RF down converter with embedded integer-N synthesizer

STW82101B
General description
The ΔT_LK parameter, specific to each VCO and calibration type, in the STW82101B is
specified in Table 8: Integer-N synthesizer electrical characteristics.
Figure 13. VCO typical sub-band characteristics
00000
00001
01111
Calibrator lock
range
11111
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
VCTRL (V)
The SERCAL bit should be set to ’1’ at each division ratio change. The calibration takes
approximately 7 periods of the Comparison Frequency and the SERCAL bit is automatically
reset to ’0’ at the end of each calibration.
The maximum allowed F_PFD to perform the calibration process is 1 MHz. If a higher F_PFD is
used the following procedure should be adopted:
1. Calibrate the VCO at the desired frequency with an F_PFD lower than 1 MHz
2. Set the A, B and R dividers ratio for the desired F_PFD
For calibration details refer to Section 9.4.1: VCO calibration procedure (I2C interface) or
Section 10.4.1: VCO calibration procedure (SPI interface).
Doc ID 018503 Rev 3
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