STE2002_06 Datasheet, PDF (29/61 Pages) STMicroelectronics – 81 x 128 single-chip LCD controller/driver

STE2002
Figure 34. Reading sequence
READING SEQUENCE
Write a "00000000" Instruction
SOUT Buffer becomes active (Low Impedence)
Source 8 pulses on SCLK and
1
Read the I2C Address or Status Byte On SOUT
SOUT Buffer Configured in High Impedence
END OF READING SEQUENCE
note: 1) these data are not read by the display Diver
2) SDIN and SOUT can be short circuited if the processor can configure
serial output buffers in high impedence during data read.
LR0078
Bus interfaces
5.3
Parallel interface
The STE2002 parallel Interface is a bidirectional link between the display driver and the
application supervisor. It consists of eleven lines: eight data lines (from DB7 to DB0) and
three control lines. The control lines are: enable (E) for data latch, PD/C for mode selection
and R/W for reading or writing.
The data lines and the control line values are internally latched on E rising edge (fig. 50).
When the parallel interface is selected, if R/W line is set to “one”, D0-D7 lines are configured
as output drivers (low impedence) and it is possible to read the driver I²C address (Fig. 51)
Table 10. STE2001-like instruction set
Instruction
D/C R/W B7 B6 B5 B4 B3 B2
B1
H=0 or H=1
00000000
0
Function Set
0 0 0 0 1 MX MY PD
V
Read Status Byte 0 1 PD A1 A2 D E MX MY
Write Data
1 0 D7 D6 D5 D4 D3 D2
D1
B0
Description
Read I²C Address
0
(with Serial Interface
only)
Power Down
H[0] Management; Entry
Mode;
DO (I²C interface only)
D0 Writes data to RAM
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