STE2002_06 Datasheet, PDF (13/61 Pages) STMicroelectronics – 81 x 128 single-chip LCD controller/driver

STE2002
Display data RAM
When Y-Carriage>MUX lines, the icon row is moved in DDRAM to the first row of the Y-
CARRIAGE Return BANK even if it is always connected on the same output Driver.
When MY=0, the icon Row is output on R80 in mux 81 mode, on R72 in MUX 65, on R64 in
MUX49 and on R56 in MUX 33.
When MY=1, and ICON MODE=1, the icon Row is output on R80 in mux 81 mode, on R72
in MUX 65, on R64 in MUX49 and on R56 in MUX 33.
When MY=1, and ICON MODE=0, the icon Row is output on R0 whatever is the MUX Rate.
When ICON MODE =1, the Memory ICON Row content is output on ICON Pad.
If Not Used ICON Pad must be left floating.
Figure 5. Automatic data RAM writing sequence with V=0 and Data RAM Normal
Format (MX=0)^(a)
0
1
2
3
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
BANK 8
BANK 9
BANK 10
BANK 11
BANK 12
124 125 126 127
Figure 6. Automatic data RAM writing sequence with V=1 and Data RAM Normal
Format (MX=0)^(a)
0
1
2
3
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
BANK 8
BANK 9
BANK 10
BANK 11
BANK 12
124 125 126 127
Figure 7. Automatic data RAM writing sequence with V=0 and Data RAM Mirrored
Format (MX=1^(a)
BANK 0
BANK 1
BANK 2
BANK 3
BANK 4
BANK 5
BANK 6
BANK 7
BANK 8
BANK 9
BANK 10
BANK 11
BANK 12
127
126
125
124
3
2
1
0
a. X Carriage=127; Y-Carriage = 12
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