STE2002_06 Datasheet, PDF (23/61 Pages) STMicroelectronics – 81 x 128 single-chip LCD controller/driver

STE2002
Instruction set
Table 7. Scrolling function
Mux rate
Icon mode
Offset
range
MUX 33
1
0-31
MUX 33
0
0-32
MUX 49
1
MUX 49
0
0-47
0-48
MUX 65
1
0-63
MUX 65
0
0-64
MUX 81
1
MUX 81
0
0-79
0-80
Description
ICON ROW NOT SCROOLED
33 LINE GRAPHIC MATRIX
ICON ROW NOT SCROOLED
49 LINE GRAPHIC MATRIX
ICON ROW NOT SCROOLED
65 LINE GRAPHIC MATRIX
ICON ROW NOT SCROOLED
81 LINE GRAPHIC MATRIX
Icon row driver with
MY=0
R56
R56
R64
R64
R72
R72
R80
R80
4.6
Dual partial display
If the PE Bit is set to a logic one the dual partial display mode is enabled.
Eight partial display modes are available. The offset of the two partial display zones is row
by row programmable. The Icon row is accessed last in each partial display frame.
Two sets of register for the HV-generator parameters are provided (PRS[1:0], Vop[6:0],
BS[2:0], CP[2:0].). This allows switching from normal mode to partial display mode applying
one instruction. The HV generator is automatically re configured using the parameters
related to the enabled mode. The parameters of the two sets of registers with the same
function are located in the same position of the instruction set. The registers related to the
normal mode are accessible when normal mode (PE=0) is selected, the others are
accessible when the partial display mode is enabled (PE=1). To Setup PRS[1:0], Vop[6:0],
BS[2:0], CP[2:0] values the instruction flow proposed in Fig.46 must be followed. To setup
Partial Display Sectors Start Address and Partial Display Mode no particular instruction flow
has to be followed.
Table 8. Dual partial display
PD2 PD1 PD0
Section 1
0 00
0
0 01
8
0 10
8
0 11
0
1 00
16
1 01
8
1 10
16
1 11
16
Section2
8 + Icon Row
0 + Icon Row
8 + Icon Row
16 + Icon Row
0 + Icon Row
16 + Icon Row
8 + Icon Row
16 + Icon Row
Reset state
000
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