M58PR256J Datasheet, PDF (25/114 Pages) STMicroelectronics – 256 Mbit or 512 Mbit (x16, Multiple Bank, Multilevel, Burst) 1.8 V supply Flash memories

M58PR256J, M58PR512J
Command interface
4.8
Buffer Program command
The Buffer Program Command makes use of the device’s 1 KByte Write Buffer to speed up
programming. Up to 1 KByte can be loaded into the Write Buffer and programmed into the
specified 1KB aligned location in the main array. The Buffer Program command dramatically
reduces in-system programming time compared to the standard non-buffered Program
command.
The Buffer Program command is supported in both the Object Program mode and the
Control Program mode.
When using the Buffer Program command in a region configured in Object mode, the start
programming address must be aligned to the 1KB buffer.
When using the Buffer Program command in a region configured in the Control Program
mode, the programmed address must be within the ’A’ Segment halves of the Program
Region (addresses with A3 = 0) and the ’B’ Segment halves of the Program Region
(addresses with A3 = 1) must be filled only with FFFFh data.
Before issuing the Buffer Program Setup command, the status register bit SR7 at bank
address should be read to ensure that the buffer is available (SR7=1).
Four successive steps are required to issue the Buffer Program command:
1. The first Bus Write cycle sets up the Buffer Program command. The setup code can be
addressed to any location within the targeted Block.
2. The second Bus Write cycle sets up the number of Words to be programmed. Value n
is written to the same Block address, where n+1 is the number of Words to be
programmed. The maximum buffer count is 1FF (512 Words).
3. Use n+1 Bus Write cycles to load the address and data for each Word into the Write
Buffer. Addresses must lie within the range from the start address to the start address +
n, where the start address is the location of the first data to be programmed. The start
address must be aligned to a 1 KB boundary.
4. The final Bus Write cycle confirms the Buffer Program command and starts the
program operation.
All the addresses used in the Buffer Program operation must lie within the same Block.
The Buffer Program operation does not change the Read Status of the banks until the Buffer
Program Confirm Command is issued. The Buffer Program Confirm Command change the
Read Status of the Bank to Read Status Register so after Buffer Program Confirm
Command, read operations in the bank will output the contents of the Status Register.
Invalid address combinations or failing to follow the correct sequence of Bus Write cycles
will set an error in the Status Register and abort the operation without affecting the data in
the memory array.
If the Block being programmed is protected an error will be set in the Status Register and
the operation will abort without affecting the data in the memory array.
During Buffer Program operations the bank being programmed will only accept the Read
Array, Read Status Register, Read Electronic Signature, Read CFI Query and the
Program/Erase Suspend command, all other commands will be ignored.
Refer to Dual Operations section for detailed information about simultaneous operations
allowed in banks not being programmed.
See Appendix C, Figure 21: Buffer Program flowchart and pseudo code, for a suggested
flowchart on using the Buffer Program command.
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