M58PR256J Datasheet, PDF (108/114 Pages) STMicroelectronics – 256 Mbit or 512 Mbit (x16, Multiple Bank, Multilevel, Burst) 1.8 V supply Flash memories

Command interface state tables
M58PR256J, M58PR512J
Table 51.
Command interface states - Modify table, next state 2
command input to chip and resulting chip next state
Current Chip State
Clear SR
Lock, CR,
Read ID ECR
Setup
Lock EFA
Setup
Blank
Check
Setup
50h 90h 98h 60h
64h
BCh
OTP
Setup
Block
Lock
Confirm
Lock-
down
Confirm
Write
CR/ECR
Confirm
C0h
01h
2Fh 03h 04h
Illegal
Cmd or
BEFP
Data
WSM
Operation
Complete
others
ready
ready
lock/CR/E
CR setup
lock EFA
block
setup
blank
check
setup
OTP
setup
ready
ready
Lock/CR/ECR Setup
Lock EFA Block Setup
ready (sequence error)
ready
ready (set
(lock)
ready
CR)
ready
N/A
ready
(EFA lock)
(lock
down)
ready ^(sequence
(sequence ^error)
error)
setup
OTP busy
OTP
busy
IS in OTP
busy
OTP busy
IS in OTP busy
OTP busy
OTP busy
IS ready
setup
WP busy
WP busy N/A
busy
WP busy
IS in program busy
IS
WP busy
ready
WP or
EFA
Block
WP
IS in
program
busy
suspend
WP
suspend WP
(error bits suspend
cleared)
WP busy
IS in PS
WP suspend
IS ready
N/A
IS in PS
WP suspend
setup
BP load 1 (give word count load (N-1))
BP load 1
if N=0 go to BP confirm else go to BP load 2 (data load)
BP load 2
BP confirm when count =0 else BP load 2
BP confirm
when
N/A
count = 0
else BP
load 2
BP confirm
BP
BP busy
BP busy
ready (sequence error)
IS in BP busy
IS
BP busy
ready
IS in BP busy
BP busy
IS ready
BP suspend
BP
suspend BP
(error bits suspend
cleared)
IS in BP suspend
BP suspend
N/A
IS in BP
suspend
BP suspend
setup
ready (sequence error)
N/A
busy
erase busy
IS in erase busy
IS
erase busy
ready
Erase or
EFA
IS in erase
busy
erase busy
Block
Erase
suspend
ES (error
bits
cleared)
ES
Lock/CR/E
CR setup
in ES
lock EFA
block
setup in
ES
IS
ES
IS non-
ready
N/A
IS in ES
ES
108/114