STAP16DPPS05 Datasheet, PDF (24/33 Pages) STMicroelectronics – Low voltage 16-bit constant current LED sink driver

Error detection mode functionality
Figure 22. Error detection sequence
Feeding 16 bit of CLK signal af ter
entering the EDM, the SDI signal, set to
1, is loaded in the shif t register
This LE/DM1 pulse latch
the data to the outputs
STAP16DPPS05
OE/DM2 and LE/DM1
sequence signals to
start the error
detection sequence
Ignore
This OE/DM2 pulse put the
device in Normal Mode
Condition af ter EDM test
On the rising edge of f irst CLK pulse af ter the detection, the SDO
provides the Output status f eedback with the sequence Out 15;
Out 14…Out 0.
In this case all the outputs are in f ault condition (Open or Short)
Turn ON the output with the OE/DM2 pin and wait 1 µs to
have the correct output status acquisition. During this time
a minimum of three CLK pulses are required (2 at the
beginning and 1 at the end) to rewrite the shif t register.
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DocID024306 Rev 6