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M50FW016 Datasheet, PDF (24/45 Pages) STMicroelectronics – 16 Mbit 2Mb x8, Uniform Block 3V Supply Firmware Hub Flash Memory | |||
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M50FW016
Table 13. Lock Register Bit Definitions
Bit Bit Name Value
Function
7-3
Reserved
2
Read-Lock
â1â Bus Read operations in this Block always return 00h.
â0â
Bus read operations in this Block return the Memory Array contents. (Default
value).
1 Lock-Down
Changes to the Read-Lock bit and the Write-Lock bit cannot be performed. Once a
â1â â1â is written to the Lock-Down bit it cannot be cleared to â0â; the bit is always reset
to â0â following a Reset (using RP or INIT) or after power-up.
â0â
Read-Lock and Write-Lock can be changed by writing new values to them. (Default
value).
0
Write-Lock
â1â
Program and Block Erase operations in this Block will set an error in the Status
Register. The memory contents will not be changed. (Default value).
â0â
Program and Block Erase operations in this Block are executed and will modify the
Block contents.
Note: 1. Applies to Top Block Lock Register (T_BLOCK_LK) and Top Block [-1] Lock Register (T_MINUS01_LK) to Top Block [-31] Lock
Register (T_MINUS31_LK).
Table 14. General Purpose Input Register Definition
Bit Bit Name Value
7-5
Reserved
4
FGPI4
â1â Input Pin FGPI4 is at VIH
â0â Input Pin FGPI4 is at VIL
3
FGPI3
â1â Input Pin FGPI3 is at VIH
â0â Input Pin FGPI3 is at VIL
2
FGPI2
â1â Input Pin FGPI2 is at VIH
â0â Input Pin FGPI2 is at VIL
1
FGPI1
â1â Input Pin FGPI1 is at VIH
â0â Input Pin FGPI1 is at VIL
0
FGPI0
â1â Input Pin FGPI0 is at VIH
â0â Input Pin FGPI0 is at VIL
Note: 1. Applies to the General Purpose Input Register (FGPI_REG).
Function
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