TDA7340G Datasheet, PDF (21/27 Pages) STMicroelectronics – AUDIO SIGNAL PROCESSOR

filter, the bass cut response becomes a low pass
filter, while the response in bass boost condition
is unchanged.
The feature is useful for human ear equalization
in noisy enviroments like cars etc.
See examples in Fig. 18 (symmetrical response)
and Fig. 19 (unsymmetrical response).
TRANSMITTED DATA (SEND MODE)
bit P = 0 Pause active
bit P = 1 No pause detected
bit ZM = 1 Zero cross mute ON
bit ZM = 0 Zero cross mute OFF
bit SM = 1 Soft mute ON
bit SM = 0 Soft mute OFF
bit ST = 1 Stereo signal detected (input MPX)
bit ST = 0 Mono signal detected (input MPX)
The TDA7340G allows the reading of four info
bits.
The type (Stereo/Mono) of received broadcasting
signal is easily checked and displayed by using
the ST bit.
The P bit check is useful in tuning jumps without
signal muting.
The SM soft mute status becomes active immedi-
ately, when bit D0 is set to 1 (soft mute ON,
MUTE byte) and not when the signal level has
reached the 60 dB final attenuation.
TDA7340G I²C BUS PROTOCOL
The protocol is standard I²C, using subaddress
byte plus data bytes (see pagg.11 to 16).
The optional Autoincrement mode allows to re-
fresh all the bytes registers with transmission of a
single subaddress, reducing drastically the total
transmission time.
Without autoincrement, subaddress bit I = 0, to
refresh all the bytes registers (10), it is necessary
to transmit 10 times the chip address, the subad-
dress and the data byte.
Working with a 100Kb/s clock speed the total time
would be :
[(9*3+2)*10]bits*10us=2.9ms
Instead using autoincrement mode, subaddress
bit I=1, the total time will be:
(9*12+2)*10us=1.1ms.
The autoincrement mode is useful also to refresh
partially the data. For example to refresh the 4
speakers attenuators it is possible to program the
TDA7340G
subaddress Spkr LF (code XX010100), followed
by the data byte of SPKR LF, LR, RF, RR in se-
quence.
Note:
that the autoincrement mode has a module 16
counter, whereas the total used register bytes are
10.
It is not correct to refresh all the 10 bytes starting
from a subaddress different than XX010000.
For example using subaddress XX010010 (vol-
ume) the registers from Volume to Stereode-
coder (see pag.11) are correctly updated but the
next two transmitted bytes instead to refer to the
wanted Input selector and Loudness are dis-
charged. (the solution in this case is to send two
separated pattern in autoinc mode, the first com-
posed by address, subaddress XX010010, 8 data
bytes, and the second composed by address,
subaddress XX010000, 2 data bytes).
With autoincrement disabled, the protocol allows
the transmission in sequence of N data bytes of a
specific register, without necessity to resend each
time the address and subaddress bytes.
This feature can be implemented, for example, if
a gradual Volume change has to be performed (
the MCU has not to send the STOP condition,
keeping active the TDA7340G communication).
WARNING
The TDA7340G always needs to receive a STOP
condition, before beginning a new START condi-
tion. The device doesn’t recognize a START con-
dition if a previously active communication was
not ended by a STOP condition.
I²C BUS READ MODE
The TDA7340G gives to the master a 1 byte
”TRANSMITTED INFO” via I2C bus in read
mode. The read mode is Master activated by
sending the chip address with LSB set to 1, fol-
lowed by acknowledge bit.
The TDA7340G recognizes the request. At the
following master generated clocks bits, the
TDA7340G issues the TRANSMITTED INFO
byte on the SDA data bus line (MSB transmitted
first).
At the nineth clock bit the MCU master can:
- acknowledge the reception, starting in this
way the transmission of another byte from
the TDA7340G.
- no acknowledge, stopping the read mode
communication.
LOUDNESS STAGE
The previous STMicroelectronics audioprocessors
were implementing a fixed loudness response,
only ON/OFF sw programmable.
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