STCF04 Datasheet, PDF (21/43 Pages) STMicroelectronics – Cell phones and smartphones

STCF04
Detailed description
Figure 10. Writing to multiple registers with incremental addressing
D EVIC E
A D D R ESS
7 bits
W
R
I
ADDRESS OF
T
REGISTER i
E
DATA i
DATA i +1
DATA i +2
DATA i+2
DATA i +n
SM
TS
AB
R
T
8.1.15
LR A M
S/ CS
BW K B
L AM
SCS
BKB
L AM
SC S
BKB
LA M
SC S
BKB
SDA LINE
LAM
SC S
BKB
LAM
SC S
BKB
LA S
SC T
BKO
P
AM11864v1
Reading from a single register
The reading operation starts with a START bit followed by the 7-bit device address of the
STCF04. The 8^th bit is the R/W bit, which is 0 in this case. The STCF04 confirms receipt of
the address + R/W bit by an acknowledge pulse. The address of the register that should be
read is sent afterwards and confirmed again by an acknowledge pulse of the STCF04 again.
Then the master generates a START bit again and sends the device address followed by the
R/W bit, which is now 1. The STCF04 confirms receipt of the address + R/W bit by an
acknowledge pulse and starts to send the data to the master. No acknowledge pulse from
the master is required after receiving the data. Then the master generates a STOP bit to
terminate the communication. See Figure 11.
Figure 11. Reading from a single register
D EVIC E
A D D R ESS
7 bits
W
A D D R ESS
R
I
OF
T
R EGISTER
E
D EVIC E
R
A D D R ESS
E
7 bits
A
D
D A TA
SM
TS
AB
R
T
LR AM
S/ CS
BWKB
L AS
SCT
BKA
R
T
RA
/C
WK
SDA LINE
L NS
S OT
BO
AP
C
K
AM11865v1
8.1.16
Reading from multiple registers with incremental addressing
Reading from multiple registers starts in the same way as reading from a single register. As
soon as the first register is read, the register address is automatically incremented. If the
master generates an acknowledge pulse after receiving the data from the first register, then
reading of the next register can start immediately without sending the device address and
the register address again. The last acknowledge pulse before the STOP bit is not required.
See Figure 12.
Doc ID 022927 Rev 3
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