STCF04 Datasheet, PDF (20/43 Pages) STMicroelectronics – Cell phones and smartphones

Detailed description
STCF04
- A sequence of data n* (1 byte + acknowledge)
- A STOP condition (STOP)
The register address byte determines the first register in which the read or write operation
takes place. When the read or write operation is finished, the register address is
automatically incremented.
Table 8. Interface protocol
Device address + R/W bit
Register address
Data
76543210
76 5 4 3210
76543210
S
TM
AS
RB
T
L
S
B
R
W
A
C
K
M
S
B
L AM
SCS
BKB
L
S
B
A
C
K
S
T
O
P
8.1.13
Writing to a single register
Writing to a single register starts with a START bit followed by the 7-bit device address of the
STCF04. The 8^th bit is the R/W bit, which is 0 in this case. R/W = 1 means a reading
operation. The master then waits for an acknowledgement from the STCF04. The 8-bit
register address is then sent to the STCF04. It is also followed by an acknowledge pulse.
The last transmitted byte is the data to be written to the register. It is again followed by an
acknowledge pulse from the STCF04. The master then generates a STOP bit and the
communication is over. See Figure 9 below.
Figure 9.
Writing to a single register
W
DEVICE
R
ADDRESS
I
7 bits
T
E
ADDRESS OF
REGISTER
DATA
AM11863v1
8.1.14
SM
TS
AB
R
T
LRAM
S /CS
BWK B
SDA LINE
LAM
SC S
BKB
LAS
SC T
BKO
P
Writing to multiple registers with incremental addressing
It would be impractical to send the device address and the address of the register when
writing to multiple registers several times. The STCF04 supports writing to multiple registers
with incremental addressing. When data is written to a register, the address register is
automatically incremented, so the next data can be sent without sending the device address
and the register address again. See Figure 10 below.
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Doc ID 022927 Rev 3