SPEAR1340 Datasheet, PDF (21/200 Pages) STMicroelectronics – Dual-core Cortex A9 HMI embedded MPU

SPEAr1340
Device functions
2.15
I2C bus controllers (I2C)
The SPEAr1340 device integrates 2 instances of an I2C controller, identified as I2C0 and
I2C1, which can be used to connect to the I2C bus peripheral.
Main features:
● Compliant to the I2C-bus specification from Philips
● Three different operating modes:
– Standard-speed mode (data rates up to 100 Kb/s)
– Fast-speed mode (data rates up to 400 Kb/s)
– High-speed mode
● Clock synchronization
● Master or slave I2C operation mode
● Multimaster operation mode (bus arbitration)
● Support for direct memory access (DMA)
● 7-bit or 10-bit addressing
● 7-bit or 10-bit combined format transfers
● Slave bulk transfer mode
● Ignores CBUS addresses (an older ancestor of I2C that used to share the I2C bus)
● Buffer transmission and reception
● Interrupt or polled-mode operation
● Handles bit and byte waiting at all bus speeds
● Digital filter for the received SDA and SCL lines
2.16
Synchronous serial port (SSP)
The synchronous serial port block includes a master or slave interface to enable
synchronous serial communication with slave or master peripherals.
Main features:
● Master or slave operation
● Programmable clock bit rate and prescaler
● Separate transmit and receive first-in, first-out memory buffers, 16-bit wide, 8 locations
deep
● Programmable choice of interface operation, SPI, Microwire, or TI synchronous serial
● Programmable data frame size from 4 to 16 bits
● Independent masking of transmit FIFO, receive FIFO, and receive overrun interrupts
● Internal loopback test mode available
● Support for direct memory access (DMA)
Doc ID 023063 Rev 4
21/200