TDA7502_06 Datasheet, PDF (20/25 Pages) STMicroelectronics – In-car remote amplifier DSP

Functional description
TDA7502
6.3.8
6.3.9
Every component hooked up to the I²C bus has its own unique address whether it is a CPU,
memory or some other complex function chip. Each of these chips can act as a receiver and
/or transmitter on its functionality.
General purpose input/output
The DSP requires a set of external general purpose input/output lines, and a reset line.
These signals are used by external devices to signal events to the DSP. The GPIO lines are
implemented as DSP's peripherals.
PLL clock oscillator
The PLL clock oscillator can accept an external clock at XTI or it can be configured to run an
internal oscillator when a crystal is connected across pins XTI & XTO. There is an input
divide block IDF (1 -> 32) at the XTI clock input and a multiply block MF (9 -> 128) in the PLL
loop. Hence the PLL can multiply the external input clock by a ratio MF/IDF to generate the
internal clock. This allows the internal clock to be within 2 MHz of any desired frequency
even when XTI is much greater than 1 MHz. It is recommended that the input clock is not
divided down to less than 1 MHz as this reduces the phase detector's update rate.
The clocks to the DSP can be selected to be either the VCO output divided by 2 to 16, or be
driven by the XTI pin directly.
The crystal oscillator and the PLL will be gated off when entering the power-down mode (by
setting a register on DSP0).
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