STCH02 Datasheet, PDF (18/24 Pages) STMicroelectronics – Offline PWM controller for ultra-low standby adapters

Application information
STCH02
3.9
Adaptive UVLO
A major problem when optimizing a converter for minimum no load consumption is that the
voltage generated by the auxiliary winding under these conditions falls considerably as
compared even to a few mA load. This very often causes the supply voltage VDD of the
control IC to drop and, as the self-supply is disabled during the burst mode, it can go below
the UVLO threshold so that the operation becomes intermittent, which is undesired.
Furthermore, this must be traded off against the need of generating a voltage not exceeding
the maximum allowed by the control IC at the full load but low enough to reduce the bias
losses as much as possible.
To help the designer to overcome this problem, the device besides reducing its own
consumption during the burst mode operation, also features a proprietary adaptive UVLO
function.
It consists of shifting the V_DD-UVLO threshold downwards at the light-load, namely when the
voltage at the FB pin falls 65 mV below the burst mode threshold V_FBB (0.6 V typ.), to have
more headroom.
To prevent any malfunction the normal threshold (9.5 V typ.) is re-established when the
voltage at the FB pin exceeds the exit burst mode threshold V_FBF.
The normal UVLO threshold ensures that at full medium-heavy loads the MOSFET will be
driven with a proper gate to source voltage.
The mode of operation is reported in Figure 10.
3.10
Overvoltage protection
The overvoltage function of the STCH02 device monitors the voltage on the ZCD pin during
MOSFET's OFF-time, where the voltage generated by the auxiliary winding tracks
converter's output voltage. If the voltage applied to the pin exceeds an internal 2.5 V
reference, a comparator is triggered, an overvoltage condition is assumed and the device is
shut down.
Once R_ZCD is fixed by feedforward considerations (see Section 3.7: Voltage feedforward
block) it is possible to calculate the value of the R_OVP resistor to activate the OVP protection
for a certain output voltage level, V_OUT-OVP:
Equation 3
Where V_OVP is the internal OVP threshold, N_SEC and N_AUX are the secondary and auxiliary
turn's number respectively.
To reduce sensitivity to noise and prevent the latch from being erroneously activated, the
OVP comparator must be triggered for four consecutive oscillator cycles before the STCH02
device is stopped. A counter, which is reset every time the OVP comparator is not triggered
in one oscillator cycle, is provided to this purpose.
Figure 11 illustrates the timing of the function.
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