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TDA7703 Datasheet, PDF (16/32 Pages) STMicroelectronics – Automatic self alignment for image rejection
Electrical specifications
TDA7703
3.4.4 Phase locked loop
Table 9. Phase locked loop
Symbol
Parameter
Tsettle
FM step
AM step
Settling time FM
FM frequency step
AM frequency step
Test condition
Δf < 10 kHz
Min
Typ
Max Units
300
µs
5
kHz
500
Hz
3.4.5 Audio DAC
Table 10. Audio DAC
Symbol
Parameter
Vout
BW
Rout
3.4.6
Output voltage
Bandwidth
Output resistance
IO interface pins
Test condition
AM 90% modulation;
FM 75 kHz deviation.
400 Hz audio frequency
1 dB attenuation
Min
Typ
Max Units
300
mVrms
15
KHz
600
750
900
Ω
Table 11. IO interface pins
Symbol
Parameter
Test condition
Min
Typ
Max Units
High level output voltage
Low level output voltage
Input voltage range
Iout = 500µA
Iout = -1mA
2.9
3.2
V
0.1
0.3
V
0
3.5
V
High level input voltage
2.0
V
Low level input voltage
0.8
V
Minimum time during which
Treset
Reset time
pin RSTN must be low so as 10
µs
to reset the device
Minimum time during which
Tlatch
Boot mode configuration latch
time
the voltage applied at pin 29
must be kept in order to latch
the correct boot mode (serial
10
µs
bus configuration)
16/32
Rev 1