TDA7703 Datasheet, PDF (11/32 Pages) STMicroelectronics – Automatic self alignment for image rejection

TDA7703
Function description
2.12
IO interface pins
The TDA7703 has the following IO pins:
SDA
pin 26 serial communication with µP
SCL
pin 27 serial communication with µP
BUSSET pin 29 serial communication with µP
RSTN pin 30 reset pin driven by µP
All the inputs are voltage-tolerant up to 3.5 V . The outputs can drive currents up to 0.5 mA
from the internal 3.3 V supply line.
2.13
Serial interface
The device is controlled with a standard I²C bus interface.
Through the serial bus the processing parameters can be modifed and the signal quality
parameters can be read out.
The operation of the device is handled through high level commands sent by the main car-
radio µP through the serial interface, which allow to simplify the operations carried out in the
main µP. The high level commands include among others:
● set frequency (which allows to avoid computing the PLL divider factors);
● start seek (the seek operation can be carried out by the TDA7703 in a completely
autonomous fashion).
The serial bus communication configuration is set by forcing pin 29 (BUSSET) to ground
when the RSTN line transitions from low to high (when RSTN is low, the IC is in reset mode).
The voltage level forced to pin 29 must be released to start the system operation a suitable
time after the RSTN line has gone high. The I²C address is 0xC2 (write) / 0xC3 (read).
The status of pin 29 during the reset phase can be set to low by not forcing any voltage on it
from outside, as a 50 kΩ internal pull-down resistors is present.
To make sure the boot mode is correctly latched up at start-up, it is advisable to keep the
RSTN line low until the IC supply pins have reached their steady state, and then for an
additional time T_reset (see Section 3.4.6).
I²C requires two signals: clock (SCL) and data (SDA - bidirectional). The protocol requires
an acknowledge after any 8-bit transmission.
A "write" communication example is shown in the figure below, for an unspecified number of
data bytes (see Communication Protocol Manual for frame structure description):
Figure 3. I²C "write" sequence
SDA
SCL
a7
a6
…
a0
START
clk1
clk2
…
address
clk8
clk9
ACK
d7
clk1
d6
…
clk2
…
data
d0
clk8
clk9
ACK
STOP
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